The display structure to be driven is characterized by
high capacitance of the display, typically of the order of 100 pF/mm.sup.2 ; PA1 a matrix structure comprised of row and column lines, and PA1 sequential row-at-a-time writing in the selected rows, whereby the currently selected row is driven by a row selection pulse formed alternately from a positive or a negative DC voltage (Vwrp or Vwrn). Unselected rows are left floating. During the validity time of the row selection pulse, all column lines are simultaneously driven by column modulation pulses having their amplitudes in the range 0 . . . Vm according to the desired luminance level of the addressed pixel on the selected row. The write sequence is continued by selecting the next row with a row selection pulse of opposite polarity to that employed on the preceding row, and then writing all pixels in the above manner. After all rows are written, that is, a full field has been written, the next field will be written in a similar fashion starting from the first row but now using row selection pulses of opposite polarity with respect to those of the preceding field. PA1 FI patent publication 62447 (ref. no. 1) PA1 Japan Display 86, S. Harada, T. Ohba, Y. Kanatani, H. Uede (ref. no. 2) PA1 Linear and Interface Circuit Applications 1986, Texas Instruments (ref. no. 3) PA1 A Low-Power Drive Scheme for AC TFEL Displays, Marvin L. Higgins, SID 85 DIGEST (ref. no. 4) PA1 Energy Recovery Sustain Circuit for the AC Plasma Display, Larry F. Weber and Mark B. Wood, SID 87 DIGEST (ref. no. 5).
For the sake of clarity, the following description elucidates the generation sequence of drive voltages for the on/off addressing of pixels on a display. If the row selection pulse has negative polarity, a column line to drive a pixel to the "ON" state receives the modulation voltage Vm, while a column line to drive a pixel to the "OFF" state is connected to the ground potential. For the next row driven by a positive-polarity row selection pulse, the column lines to drive a pixel to the "ON" state are correspondingly connected to the ground potential and the column lines to drive a pixel to the "OFF" state are raised to the modulation voltage Vm. Thus, for a row selection pulse of positive polarity, the "ON"-state pixel is excited by the voltage Vwrp and the "OFF"-state pixel by the voltage Vwrp-Vm. For a row selection pulse of negative polarity, these excitation voltages are Vm-Vwrn and Vwrn, respectively.
The current state of the art is illustrated in the following reference publications:
The principles of symmetric drive schemes are to be found in, e.g., reference no. 1. A block diagram of the electronics circuits for a display is shown in FIG. 1.
For the symmetric drive scheme, circuits for row line pulsers are not conventionally known. It can be inferred, however, from the description and illustrations of the symmetric drive scheme disclosed in ref. no. 2 that the row pulser has here been implemented using a switch in which a series resistance is employed for limiting the voltage rate-of-rise during the rise phase of the row selection pulse. The discharging phase of the row selection pulse is evidently implemented with the help of a row driver circuit.
For the refresh drive scheme, row pulsers are generally implemented either using switches in which the voltage rate-of-rise and rate-of-fall are limited by a series resistance (ref. no. 3) or by means of constant-current switches (ref. no. 4).
When generating a pulse to a capacitive load, power consumption can be reduced by using an inductor in the pulser circuit. In circuits disclosed in the art, an inductor has been employed in the column pulser (ref. no. 4) and in the sustain pulser of a plasma display (ref. no. 5), but not in row pulsers.
Disclosed in ref. no. 4 is a resonant-type column pulser in which the inductor is connected in series with the load to be driven, complemented with four switches S1 . . . S4 and four clamp diodes. Switch S1 is employed for charging the line load via the inductor, switch S2 serves for discharging the energy of the line load, and switch S3 routes the full amplitude sustain voltage from the supply voltage to the junction of the inductor and the load as well as aids to inhibit a possible backward oscillation. Switch S4 is placed from the junction of the inductor and the load to the ground so that it can activated to inhibit further oscillation after the discharging phase and to connect all columns to the ground potential for the duration of the refresh pulse. Both ends of the inductor are connected by diodes D1 . . . D4 to the ground and the supply voltage so as to limit the oscillation between the supply voltage and the ground potential.
Disclosed in ref. no. 5 are the methods with which optimized timing of the switches can be utilized for improving the efficiency of the circuit configuration given in ref. no. 4 and simultaneously decreasing the peak value of the current pulse. In order to circumvent a complicated drive scheme of the switches, the authors of ref. no. 5 present an alternative circuit configuration which employs the commonly known characteristic of an LC circuit that the voltage over the capacitance in a series circuit of a capacitance and inductor rises to a two-fold value of the input step function amplitude. Thus, by complementing the drive circuit by a second supply voltage of half the required drive pulse amplitude and replacing switches S1 and S2 employed in the circuit of ref. no. 4 by unidirectional switches between the inductor and said extra voltage supply, the precise timing requirement of switch control signals is relaxed.
The prior-art techniques are hampered by several disadvantages.
In addition to the repetition rate of the row selection pulse, its duration is a factor that controls the luminance of the ACTFEL display. When the display matrix is large, comprising 400 pixel rows or more, the row selection pulse would become unnecessarily narrow in the drive concept according to ref. no. 2 due to the multiphase charging scheme; so the drive concept dealt with in the preambulatory part of this description and reference no. 1 is more appropriate for practical purposes. Herein, however, the use of a simple row pulser disclosed in ref. no. 2 is not possible, but instead, separate row pulser circuits must be employed for the positive and negative pulser, respectively.
Use of a resistive element for limiting the voltage rate-of-rise of the row selection pulse (ref. no. 3) is a poor solution in terms of the display luminance, because the pulse width is thereby narrowed, particularly above the luminance threshold voltage of the selected pixel. Here, as well as in the constant-current circuit of ref. no. 4, high power consumption is another disadvantage. The high power consumption results from higher line capacitance of the symmetric drive scheme with respect to that of refresh-type circuitry. The push-pull-type driver circuits required in the symmetric row drive scheme further contribute to the capacitive load by their own output capacitance.
Thus, the row pulser of the symmetric drive scheme is loaded by the combined capacitance of a single selected row and the capacitance of the row drive circuits. For instance, in a 480-row display the row line capacitance is 3.5 nF and the row driver circuits add 4.2 nF capacitance to this. Assuming a typical 180 V amplitude for the row selection pulse, power demand from the pulser without power recovery circuits would be EQU 480*(3.5 nF+4.2 nF)*180.sup.2 V.sup.2 *60 Hz=7.2 W.
Use of constant-current switches, for example, would impose a fourth of these power losses, that is, 1.8 W on a single switch, which in practice would exclude surface-mount switch component.
Implementations based on the use of a series inductance according to reference nos. 4 and 5 have two serious drawbacks.
Firstly, a functionally important drawback is that no practical circuit is devised for discharging the row line energy.
With the positive-voltage pulser there is a limitation that the row line cannot be discharged below the potential of unselected floating row lines down to ground potential without causing excessively high power losses. The reason is that, depending on the pixel data, the voltage of said floating row lines varies in the range 0 . . . Vm, and this voltage would be dumped via the upper clamp diode of push-pull-type row driver circuits, thus bringing a significant increase to power losses, because in the worst case the entire panel capacitance would act as the load for the driver.
In the negative-voltage row pulsers as well, the implementation of the discharging phase is problematic. Use of a commercially available row driver circuit assumes that the unselected row lines are taken to the LOW state of the driver circuit for the duration of the positive-voltage row selection pulse. Resultingly, the negative-voltage row selection pulse output must be allowed to float in the voltage range 0 . . . Vm during the positive-voltage row selection pulse in order to avoid undue increase in power consumption.
Another important drawback in the circuit implementations according to reference nos. 4 and 5 is their lack of protective measures for start and fault situations. When an optimized design for cost and packaging is desired, it is of primary importance that there is no need for overdimensioning the pulser switch elements for said situations.
Further handicaps on the way of developing the column driver concept disclosed in ref. no. 4 into a positive-voltage pulser circuit are set by poor efficiency as well as high peak current at the end of the charging and discharging phases of row line driving, which is detrimental to the life of the row electrode connector and limitation of EMI emissions.
An additional disadvantage hampering the applications of the sustain pulser according to ref. no. 5 is caused by its need for auxiliary supply voltages. The auxiliary voltage supplies can be replaced by mere capacitors, but this alternative dictates overdimensioning of switch elements for start situations, and in addition to the extra space consumption and cost of capacitors, brings along an abnormally steep pulse which sets stresses on the driver circuits and row electrode contacts at the start situation. Provided that these two serious drawbacks can be avoided, it is, however, possible to achieve easier integration of circuits, which in future applications may bring the nuisance of extra costs from the auxiliary power supplies to a tolerable level.
It is an object of the present invention to overcome the disadvantages of the prior-art technology and to achieve a novel circuit for generation of row selection pulses and a method for generating said pulses.